Optical Link ASICs for LHC Upgrades

We have designed three ASICs for possible applications in a new pixel layer (Insertable B-Layer or IBL) for the ATLAS detector for the first phase of the LHC luminosity upgrade. The ASICs are a high-speed driver for the VCSEL (VerticalCavity Surface-Emitting Laser), a receiver/decoder to decode the signal received at the PIN diode to extract the data and clock, and a clock multiplier to produce a higher frequency clock to serialize the data for transmission. These ASICs were designed using a 130 nm CMOS process to enhance the radiation-hardness. We have characterized the ASICs and the submission has been mostly successful. We irradiated the ASICs with 24 GeV/c protons at CERN to a dosage of 70 Mrad. We observed no significant degradation except the driver circuit in the VCSEL driver fabricated using the thick oxide process in order to provide sufficient voltage to drive a VCSEL. The degradation is due to the radiation induced large threshold shifts in the PMOS transistors used. © 2001 Elsevier Science. All rights reserved